Design and implementation of GPU-based turbo decoder with a minimal latency

Ahn, Heungseop; Jin, Yong; Han, Sangwook; Choi, Seungwon; Ahn, Sungsoo

doi:10.1109/ISCE.2014.6884510

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Design and implementation of GPU-based turbo decoder with a minimal latency

Ahn, Heungseop;
Jin, Yong;
Han, Sangwook;
Choi, Seungwon;
Ahn, Sungsoo

Citations

SCOPUS

3

초록

Decoding latency of the turbo decoder has been a serious problem in real-time processing of communication systems. This paper presents a novel procedure of reducing the latency of the turbo decoder which has been implemented with GPU (Graphic Processing Unit). The main contribution of this paper is to present an efficient procedure of reducing the latency of GPU-based turbo decoder through an efficient parallel processing of maximum a posteriori (MAP). Through experimental tests, we have verified that the proposed turbo decoder reduces the latency from 34,767μs to 273μs per iteration.

키워드

CUDA; GPU; parallel MAP decoder; Turbo decoder; Electronics engineering; Electronics industry; CUDA; Design and implementations; GPU; Graphic processing units; MAP decoder; Maximum a posteriori; Parallel processing; Turbo decoders; Consumer electronics

제목: Design and implementation of GPU-based turbo decoder with a minimal latency

저자: Ahn, Heungseop; Jin, Yong; Han, Sangwook; Choi, Seungwon; Ahn, Sungsoo

DOI: 10.1109/ISCE.2014.6884510

발행일: 2014-06

유형: Conference Paper

저널명: Proceedings of the International Symposium on Consumer Electronics, ISCE

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