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초록
The multilevel dual channel (MLDC) NAND flash memory cell structures with asymmetrically-doped channel regions are proposed. The channel structures with a MLDC flash cell consisted of the two different doping channel regions. The technical computer aided design simulation results showed that the designed MLDC NAND flash cell provided the high-speed multilevel reading and program verifying due to the sensing of the discrete current levels utilizing the unique asymmetric channel structure.
키워드
Asymmetrically-doped channel; Current sensing; Multi-level dual-channel; Reduce reading and program verifying time; Computer aided design; Data storage equipment; NAND circuits; Nanotechnology; Speed; Technology; Asymmetric channels; Asymmetrically-doped channel; Channel regions; Channel structures; Current levels; Current sensing; Doped channels; Dual channels; Flash cells; High speeds; Multi-level dual-channel; NAND Flash; NAND Flash memories; Reduce reading and program verifying time; Flash memory
- 제목
- Multilevel dual-channel NAND flash memories with high-speed read and verifying program
- 저자
- Kim, Jae-Ho; Lee, Joung-Woo; Mun, Kyung-Sik; Kim, Tae Whan
- 발행일
- 2006-10
- 유형
- Conference Paper
- 저널명
- 2006 IEEE Nanotechnology Materials and Devices Conference, NMDC
- 권
- 1
- 페이지
- 382 ~ 383