Enhancement of the Memory Effects for Nonvolatile Memory Devices Fabricated Utilizing ZnO Nanoparticles Embedded in a Si3N4 Layer

  • Oh, Do-Hyun
  • Cho, Woon-Jo
  • Son, Dong Ick
  • Kim, Tae Whan
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초록

ZnO nanoparticles embedded in a Si3N4 layer by using spin-coating and thermal treatment were fabricated to investigate the feasible applications in charge trapping regions of the metal/oxide/nitride/oxide/p-Si memory devices. The magnitude of the flatband voltage shift of the capacitance-voltage (C-V) curve for the Al/SiO2/ZnO nanoparticles embedded in Si3N4 layer/SiO2/p-Si memory device was larger than that of Al/ZnO nanoparticles embedded in SiO2 layer/p-Si and Al/SiO2/Si3N4/SiO2/P-Si devices. The increase in the flatband voltage shift of the C-V curve for the Al/SiO2/ZnO nanoparticles embedded in Si3N4 layer/SiO2/p-Si memory device in comparison with other devices was attributed to the existence of the ZnO nanoparticles or the interface trap states between the ZnO nanoparticles and the Si3N4 layer resulting from existence of ZnO nanoparticles embedded in the Si3N4 layer.

키워드

ZnO NanoparticleSi3N4MONOSMemory EffectsSILICON NANOCRYSTALSCONFINEMENT
제목
Enhancement of the Memory Effects for Nonvolatile Memory Devices Fabricated Utilizing ZnO Nanoparticles Embedded in a Si3N4 Layer
저자
Oh, Do-HyunCho, Woon-JoSon, Dong IckKim, Tae Whan
DOI
10.1166/jnn.2010.2272
발행일
2010-05
유형
Article; Proceedings Paper
저널명
Journal of Nanoscience and Nanotechnology
10
5
페이지
3508 ~ 3511