An Analysis of CMOS Latched Comparators

Citations

SCOPUS

2

초록

Using suitable types of CMOS latched comparators for specific conditions is vital -because each comparator has different pros and cons. Also, it is important to determine which comparators to utilize for specific conditions. A need remains for the practical comparison of various types of comparators with applicable criteria. Within the present study, we performed comparisons between StrongArm latch, modified double-tail latch, and track-and-regenerate slicer with three different types of criteria. We analyzed each comparator by controlling three types of variables: power supply, input common mode voltage, and differential signal input. Then, in keeping with these three types of criteria, the simulation results, kickback noise, power consumption, and clock-to-Q delay were evaluated. We designed three kinds of CMOS latched comparators with 40-nm CMOS technology. In post-layout simulations, using a StrongArm latch resulted in low power consumption. Modified double-tail latch showed strength in kickback noise and is applicable for low power supply. Track-and-regenerate slicer showed better performance in clock-to-Q delay. Our findings expand on the performance of each comparator that would be applied to mixed-signal circuits and systems.

키워드

clock-to-Q delayCMOSkickback noiselatched comparatorslicerClocksCMOS integrated circuitsComparator circuitsElectric power utilizationElectric signal systemsMixed signal integrated circuitsComparators (optical)Clock-to-Q delayCMOSConditionKickback noiseLatched comparatorPerformancePower supplySliceStrongARMVariable power
제목
An Analysis of CMOS Latched Comparators
저자
Yeom, Sunoh심태양Han, Jaeduk
DOI
10.1109/ICEIC57457.2023.10049873
발행일
2023-02
유형
Conference Paper
저널명
2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
페이지
1 ~ 4