An Analysis of Current-mode Drivers in 40-nm CMOS Technology

Lim, Bona; Jo, Hanhee; Han, Jaeduk

doi:10.1109/ISOCC59558.2023.10396410

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An Analysis of Current-mode Drivers in 40-nm CMOS Technology

Lim, Bona;
Jo, Hanhee;
Han, Jaeduk

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초록

This paper compares two prominent high-speed link transmitter driver topologies, cascode current-mode logic (CML) and tailless CML, exploring their design tradeoffs. Analysis and simulation results reveal that the cascode CML exhibits higher output resistance due to the presence of a tail current source, while the tailless CML demonstrates faster operation with reduced output capacitance. Additionally, this study highlights the tradeoff between driver output swing and power consumption.

키워드

cascode current-mode logic (CML); design tradeoffs; high-speed link transmitters; tailless CML; Analog circuits; Cascode amplifiers; CMOS integrated circuits; Computer circuits; Electric resistance; Integrated circuit design

제목: An Analysis of Current-mode Drivers in 40-nm CMOS Technology

저자: Lim, Bona; Jo, Hanhee; Han, Jaeduk

DOI: 10.1109/ISOCC59558.2023.10396410

발행일: 2023-10

유형: Proceedings Paper

저널명: 2023 20TH INTERNATIONAL SOC DESIGN CONFERENCE, ISOCC

페이지: 355 ~ 356