WDP: A Weighted Delay Prediction Method for Integrated Circuit Interconnects

초록

As the performance and scaling of integrated circuits advance continuously, the importance of evaluating their timing characteristics becomes increasingly significant. However, pre-existing analytic models achieve limited accuracy, and simulation-based approaches consume prohibitive resources, especially for various ramped inputs. This paper therefore introduces a method of estimating the propagation delay of wires represented by complex RC networks for ramped inputs, by combining analytic methods and machine-learning (ML) based correction techniques for high accuracy. The proposed Weighted Delay Prediction (WDP) technique utilizes the Probability Distribution Function Extension for Ramp Inputs (PERI) method and Penfield-Rubinstein bounds to establish upper and lower bounds of delay based on the input transition time. After that, the propagation delay is precisely estimated based on the weighted summation of the boundary values, where the weight coefficients are computed from the Random Forest (RF). Evaluation results indicate that the proposed method can accurately predict the propagation delays across various interconnect networks and input transition times, while consuming significantly fewer resources compared to purely simulation-based methods.

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