100-112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3+1 Hybrid FFE Taps in 40-nm Technology

100-112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3 + 1 Hybrid FFE Taps in 40-nm Technology
  • Song, Eunji
  • Yang, Jeonghyu
  • Oh, Youngmin
  • Hong, Seungwook
  • Lee, Dongjun
  • ... Han, Jaeduk
  • 외 3명
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초록

This article presents two eight-level pulse amplitude modulation (PAM-8) transmitters (TX) that achieve 100-and 112-Gb/s data rates, and a high output swing of 1.6 peak-to-peak differential voltage (Vppd) in 40-nm CMOS technology. The high-voltage driver is adopted to enhance the output swing level with the protective cascode and current-bleeding techniques. The hybrid 3+1 tap feed-forward equalizer (FFE) is implemented for efficient channel equalization. Two types of high-speed multiplexers are introduced for the final 4-to-1 serialization: a single-stack and single-stage multiplexer that achieves 33.3 Gbaud/s and a two-stage multiplexer at 37.3 Gbaud/s. Two prototype test chips are fabricated in 40-nm CMOS technology to evaluate the proposed multiplexer designs. The transmitters achieve the PAM-8 data rates of 100 Gb/s (for the single-stage multiplexer) and 112 Gb/s (for the two-stage multiplexer), with worst case eye-opening values of 45 and 57 mV. Their energy efficiencies are measured to be 3.35 and 4.56 pJ/bit.

키워드

Cascodehigh-voltage driversmultiplexerspredriverstransmitters56 GB/S NRZ3-TAP FFE
제목
100-112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3+1 Hybrid FFE Taps in 40-nm Technology
제목 (타언어)
100-112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3 + 1 Hybrid FFE Taps in 40-nm Technology
저자
Song, EunjiYang, JeonghyuOh, YoungminHong, SeungwookLee, DongjunLee, SangwanIm, HyunwooShin, TaehoHan, Jaeduk
DOI
10.1109/JSSC.2024.3492061
발행일
2025-02
유형
Article; Early Access
저널명
IEEE Journal of Solid-State Circuits
60
2
페이지
543 ~ 554