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A 16-Gb/s/wire 4-Wire Short-Haul Transceiver with Balanced Single-Ended Signaling (BASES) in 28-nm CMOS
- Kim, Hyochang;
- Seo, Hyeongmin;
- 김현태;
- Yoo, Changsik;
- Han, Jaeduk
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5초록
This paper presents a 4-wire, 3-level, and 16-Gb/s/wire transceiver array for short-reach interconnects. The proposed transceiver adopts the balanced single-ended signaling (BASES) to reduce the simultaneous switching noise (SSN) and the electro-magnetic interference (EMI). The four transmit encoders and voltage-mode drivers produce three-level, common-mode-balanced, and multi-lane signals. The receive terminations and equalizers utilize the CM-balancing property of the BASES coding to recover the transmitted signals with a high noise rejection capability. The 4-wire transceiver was fabricated in a 28-nm CMOS technology and achieved a 64-Gb/s aggregate data rate with 3.15-pJ/bit energy efficiency.
키워드
Single-end signaling; balanced coding; 4-bit 4-wire BASES coding; parallel link; memory interface; simultaneous switching noise (SSN); electro-magnetic interference (EMI); common-mode distortions; transceiver; NOISE
- 제목
- A 16-Gb/s/wire 4-Wire Short-Haul Transceiver with Balanced Single-Ended Signaling (BASES) in 28-nm CMOS
- 저자
- Kim, Hyochang; Seo, Hyeongmin; 김현태; Yoo, Changsik; Han, Jaeduk
- 발행일
- 2023-08
- 유형
- Article
- 권
- 70
- 호
- 8
- 페이지
- 2799 ~ 2803