Performance analysis of hardware modules of the hash function ARIRANG

Citations

SCOPUS

1

초록

MD5 and SHA (Secure Hash Algorithm)-1 are international standards and widely used hash algorithms. Since these algorithms are getting vulnerable to attacks, NIST (National Institute of Standard and Technology) collected publicly SHA-3 although weaknesses of SHA-2[9] have not been found. ARIRANG[8] is a new hash algorithm and one of candidates for the SHA-3 competition. Compared with SHA-2, ARIRANG has more security intensity whereas its embodiment uses more resources. In this paper, we embodied hardware ARIRANG modules. Then, we compared the resource increments of the hardware ARIRANG module against the hardware SHA-2 module with the resource increments of the software module of them. We embodied the hardware module using the Verilog HDL and VHDL, and compared together. Also, our implementation contains a simplified SubBytes operation block using composite fields (GF((24)2) and GF(((22)2)2)) with an 8-bit look-up table in GF(28) .

키워드

ARIRANGHardware embodimentHash functionARIRANGComposite fieldsHardware modulesHash algorithmInternational standardsLook up tableNational institute of standardsPerformance analysisSecure hash algorithmSoftware modulesVerilog HDLHardwareHash functionsTable lookupComputer hardware description languages
제목
Performance analysis of hardware modules of the hash function ARIRANG
저자
Lee, Jae SeongKim, Dong Kyue
DOI
10.1109/ICNIDC.2009.5360905
발행일
2009-11
유형
Conference Paper
저널명
Proceedings of 2009 IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC2009
페이지
1056 ~ 1060