A 96-Gb/s PAM-8 Transmitter with Transition-Boosted Current-Mode Logic Driver in 40-nm CMOS for Wireline Communication

  • Lim, Bona; 
  • Jo, Hanhee; 
  • Jeong, Heedo; 
  • Yang, Jeonghyu; 
  • Han, Jaeduk
Citations

SCOPUS

1

초록

A 96-Gb/s PAM-8 transmitter with a transition-boosted current-mode logic (TBCML) driver is introduced and fabricated in 40-nm CMOS technology. The proposed TBCML driver incorporates cross-coupled gate voltage boosting and feedforward coupling techniques to enhance transition speeds for high-speed operation. The implemented transmitter achieves a differential peak-to-peak output swing of 657 mV at a data rate of 96 Gb/s. Feedforward equalization (FFE) is applied to mitigate inter-symbol interference (ISI). The prototype transmitter occupies a die area of 0.15 mm2 and achieves an energy efficiency of 4.33 pJ/b with a total power consumption of 416 mW.

키워드

cascode; current-mode logic driver; feed-forward equalization; PAM-8; transition-boosting; transmitter; CMOS integrated circuits; Computer circuits; Energy efficiency; Equalizers; Intersymbol interference
제목
A 96-Gb/s PAM-8 Transmitter with Transition-Boosted Current-Mode Logic Driver in 40-nm CMOS for Wireline Communication
저자
Lim, Bona; Jo, Hanhee; Jeong, Heedo; Yang, Jeonghyu; Han, Jaeduk
DOI
10.1109/ISCAS56072.2025.11043270
발행일
2025-06
유형
Conference paper
저널명
IEEE International Symposium on Circuits and Systems proceedings
페이지
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