Low Power MAC Design with Variable Precision Support

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초록

Many DSP applications such as FIR filtering and DCT (discrete cosine transformation) require multiplication with constants. Therefore, optimizing the performance of constant multiplication improves the overall performance of these applications. It is well-known that shifting can replace a constant multiplication if the constant is a power of two. In this paper, we extend this idea in such a way that by employing more than two barrel shifters, we can design highly efficient constant multipliers, We have found that by using two or three shifters, we can generate a large set of constants. Using these constants, we can execute a typical set of FIR or DCT applications with few errors. Furthermore, with variable precision support, we can carry Out a fairly large class of DSP applications with high computational efficiency. Compared to conventional multipliers, we can achieve power savings of up to 56% with negligible computational errors.

키워드

digital arithmeticdigital signal processorsconstant multiplicationpower consumptionPARTIAL PRODUCTSMULTIPLIERSPROCESSORS
제목
Low Power MAC Design with Variable Precision Support
저자
Lee, Young-GeunJung, Han-SamChung, Ki-Seok
DOI
10.1587/transfun.E92.A.1623
발행일
2009-07
유형
Article
저널명
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E92A
7
페이지
1623 ~ 1632