Multilevel nonvolatile memory effects in hybrid devices containing CdSe/ZnS nanoparticle double arrays embedded in the C-60 matrices

  • Li, Fushan
  • Cho, Sung Hwan
  • Son, Dong Ick
  • Park, Kyu Ha
  • Kim, Tae Whan
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초록

Electrical properties of nonvolatile memory devices containing core/shell CdSe/ZnS nanoparticle double arrays embedded in the C-60 layers formed by using a spin-coating technique were investigated. Transmission electron microscopy images showed that CdSe/ZnS nanoparticles were randomly distributed in the C-60 layers. Capacitance-voltage (C-V) measurements on Al/C-60/double-stacked CdSe/ZnS nanoparticle arrays/C-60/p-Si devices showed that the flat-band voltage shift of the C-V curve related to the charge storage density was enhanced due to a stack of the CdSe/ZnS nanoparticle layers and that the flat-band voltage shift increased with the magnitude of applied bias voltage due to the variations of the charged electron density in the stacked CdSe/ZnS nanoparticle double arrays.

키워드

THIN-FILM TRANSISTORSNANOCRYSTALSCAPACITORSENERGYDOTS
제목
Multilevel nonvolatile memory effects in hybrid devices containing CdSe/ZnS nanoparticle double arrays embedded in the C-60 matrices
저자
Li, FushanCho, Sung HwanSon, Dong IckPark, Kyu HaKim, Tae Whan
DOI
10.1063/1.2898163
발행일
2008-03
유형
Article
저널명
Applied Physics Letters
92
10
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1 ~ 3