Thermally robust HZO/poly-Si ferroelectric stacks enabled by an ultrathin Ga2O3 interlayer

초록

Hafnium oxide-based ferroelectrics have emerged as promising candidates for next-generation 3D NAND flash memory, addressing the scaling limitations and retention issues of conventional charge-trap technology. However, integrating these materials with polycrystalline silicon channels is challenged by the thermal budget associated with poly-Si channel crystallization with punch-and-plug process steps in 3D NAND process flows. Such elevated temperatures promote the growth of a parasitic low-permittivity SiOx layer and generate metallic defects at the interface, leading to severe electric field screening and ferroelectric degradation. In this work, we demonstrate a thermally stable TiN/Hf0.5Zr0.5O2 (HZO)/poly-Si gate stack incorporating an ultrathin (~1 nm) Ga2O3 interlayer to mitigate these interfacial issues. The Ga2O3 interlayer acts as a robust oxygen diffusion barrier, suppressing interfacial redox reactions at the HZO/poly-Si interface after post-metallization rapid thermal annealing at 900 ℃ for 30 s. Consequently, whereas devices without the interlayer exhibit a negligible ferroelectric switching behavior, devices with the interlayer maintain a high fitted relative peak-area fraction assigned to the orthorhombic phase (~73 % at 900 ℃) and preserve ferroelectric switching with a double remanent polarization of ~38 µC/cm2 after annealing at 800 ℃ and ~26 µC/cm2 after annealing at 900 ℃. These results demonstrate that the Ga2O3 interlayer provides an effective interface engineering approach for improving the thermal-process compatibility of HZO ferroelectrics with poly-Si channels for future 3D NAND process integration.

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