Morphotropic Phase Boundary Engineering via Heterostructure for Low-Voltage Ferroelectric Capacitors

  • Han, Changhyeon; 
  • Kwak, Been; 
  • Kwon, Ki-Ryun; 
  • Kim, Jeong-Han; 
  • Yim, Jiyong; 
  • ... Kwon, Daewoong; 
  • 외 2명
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초록

We investigated morphotropic phase boundary (MPB) engineering via heterostructure design to achieve low-voltage and fast-switching ferroelectric capacitors based on HfxZr1-xO2 (HZO). By integrating an MPB layer with a conventional ferroelectric HZO layer in a metal–ferroelectric–metal (MFM) structure, the proposed heterostructure (HZOHetero) exhibits a ≈25% reduction in coercive voltage and an approximately 10% increase in capacitance compared to conventional ferroelectric HZO capacitors, while maintaining the same physical thickness. These improvements originate from polarization switching in the MPB layer near 0 V, which synergistically enhances the effective electric field across the ferroelectric layer, together with an optimized phase balance that lowers the polarization switching barrier. This MPB-based heterostructure strategy offers a CMOS-compatible and energy-efficient pathway for advanced ferroelectric capacitors targeting low-power memory applications.

키워드

ferroelectric; heterostructure; Hf<sub>x</sub>Zr<sub>1-x</sub>O<sub>2</sub>; metal-ferroelectric-metal; morphotropic phase boundary; switching acceleration; POLARIZATION
제목
Morphotropic Phase Boundary Engineering via Heterostructure for Low-Voltage Ferroelectric Capacitors
저자
Han, Changhyeon; Kwak, Been; Kwon, Ki-Ryun; Kim, Jeong-Han; Yim, Jiyong; Kim, Hyun-Min; Kwak, Sangeun; Kwon, Daewoong
DOI
10.1002/aelm.70418
발행일
2026-06
유형
Article
저널명
Advanced Electronic Materials
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