A CMOS sub-harmonic mixer for direct conversion receiver

Lee, Jeongeo; Liuyang; Choi, Sungjoo; Lee, Jaeseok; Kim, Hyeong dong

doi:10.1109/APMC.2009.5384300

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A CMOS sub-harmonic mixer for direct conversion receiver

Lee, Jeongeo;
Liuyang;
Choi, Sungjoo;
Lee, Jaeseok;
Kim, Hyeong dong

Citations

SCOPUS

3

초록

A sub-harmonic passive mixer for WiBro (2.3∼2.4GHz) in 0.18 μm COMS process has been designed. The circuit includes a differential phase splitter for the LO circuit. This architecture have a low flicker noise (20.29Hz) and a good double sideband noise figure (9.29dB) while demanding little power consumption. The input referred 1-dB compression point is -4.3dBm, IIP2 is 33.12dBm and IIP3 is -3.44dBm. In this paper, it is to understand the mechanism of SHM.

키워드

CMOS; Direct Conversion receiver; Poly-phase filters(PPF); Sub-harmonic mixer (SHM); WiBro; 1dB compression point; CMOS sub-harmonic mixer; Differential phase; Direct conversion receivers; Double-sideband; Low flicker noise; Passive mixers; Poly-phase filters; Power Consumption; Sub-harmonic mixer; Subharmonics; CMOS integrated circuits; Harmonic analysis; Microwaves; Mixing; Millimeter wave devices

제목: A CMOS sub-harmonic mixer for direct conversion receiver

저자: Lee, Jeongeo; Liuyang; Choi, Sungjoo; Lee, Jaeseok; Kim, Hyeong dong

DOI: 10.1109/APMC.2009.5384300

발행일: 2009-12

유형: Conference Paper

저널명: APMC 2009 - Asia Pacific Microwave Conference 2009

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