A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

Wang, Zhongkai; Choi, Minsoo; Wright, John; Lee, Kyoungtae; Liu, Zhaokai; Yin, Bozhi; Han, Jaeduk; Du, Sijun; Alon, Elad

doi:10.1109/ISCAS48785.2022.9937615

상세 보기

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

Wang, Zhongkai;
Choi, Minsoo;
Wright, John;
Lee, Kyoungtae;
Liu, Zhaokai;
... Han, Jaeduk;
외 3명

Citations

WEB OF SCIENCE

5

Citations

SCOPUS

5

초록

We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma (Delta Sigma) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.

키워드

hybrid; PLL; PLL generator; ring oscillator; sub-sampling; Modulators; Phase locked loops; A-RINGS; Delta sigma modulator; Delta-sigma; Design flows; Hybrid; Phase-locked loop generator; Ring oscillator; Sampling phasis; Sigma delta; Sub-sampling

제목: A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

저자: Wang, Zhongkai; Choi, Minsoo; Wright, John; Lee, Kyoungtae; Liu, Zhaokai; Yin, Bozhi; Han, Jaeduk; Du, Sijun; Alon, Elad

DOI: 10.1109/ISCAS48785.2022.9937615

발행일: 2022-05

유형: Proceedings Paper

저널명: 2022 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 22)

권: 2022-May

페이지: 2881 ~ 2885