Simulation of reduced charge interference in 3-D vertical gate nand flash memory

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초록

In this work, we propose two type of structures to reduce the charge interference by stored charge in the opposite side cell of a vertical gate 3-dimensional NAND flash memory. The first structure is a barrier oxide and the second is a virtual ground. The barrier oxide physically blocks electrons moving by repulsive force from charge stored on the opposite cell. The virtual ground increases the energy band bending level close to the body region at the center and it blocks the effect of converged holes better then when only the barrier oxide was used. We investigated the I-V characteristics of the different structures at double programming or single programming. We used 3-D TCAD simulation tool and confirmed the effect of reduce charge interference by the proposed structures.

키워드

BICSCharge interferenceMONOSVG NANDVirtual groundBICSCharge interferenceMONOSVG NANDVirtual groundInterference suppressionNAND circuitsThree dimensionalFlash memory
제목
Simulation of reduced charge interference in 3-D vertical gate nand flash memory
저자
Choi, Seonjun Lee, JunhyukOh, SeulkiLee, Seung-Beck
DOI
10.1109/ICNIDC.2010.5657914
발행일
2010-12
유형
Conference Paper
저널명
Proceedings - 2010 2nd IEEE International Conference on Network Infrastructure and Digital Content, IC-NIDC 2010
페이지
140 ~ 144