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Increasing channel area of 3D Stackable Vertical gate flash memory by inter-bit line dielectric reduction
- 제목
- Increasing channel area of 3D Stackable Vertical gate flash memory by inter-bit line dielectric reduction
- 저자
- 이승백
- 발행일
- 2010-08-20
- 학회명
- IEEE NANO 2010 10th IEEE International Conference on Nanotechnology Joint Symposium with NANO KOREA
- 개최지
- KINTEX KOREA