On-state darin current modeling for grain and grain boundary effect of the polysilicon materials at various temperatures

Yang, Hyung-Jun; Lee, Gae-Hun; Song, Yun-Heub

doi:10.1109/ICNIDC.2014.7000293

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On-state darin current modeling for grain and grain boundary effect of the polysilicon materials at various temperatures

Yang, Hyung-Jun;
Lee, Gae-Hun;
Song, Yun-Heub

Citations

SCOPUS

4

초록

We present analytical on-state drain current model of 2-dimensional (2D) planar-type poly-Silicon TFT devices. The effect of grain and grain boundary on the carrier transport of 2D poly-Silicon devices has been studied by simulation (matlab) tool. Especially, we considered physical parameters such as grain length (L<inf>g</inf>), grain boundary length (L<inf>gb</inf>) and grain boundary trap density (N<inf>GB</inf>) in order to analyze cell performance of the poly-Silicon materials at various temperature. Thus, we simulated the temperature dependence of the on-state drain current within a wide temperature range from 248 K (-25 °C) to 348 K (75 °C). From these results, we confirmed that grain length and grain boundary trap density significantly effects on-state drain current in poly-Silicon materials.

키워드

grain; grain boundary; modeling; on-state current; poly-Silicon TFTs; Grain (agricultural product); Grain boundaries; MATLAB; Models; Polysilicon; Silicon; Temperature distribution; Cell performance; Current modeling; Drain current models; Grain boundary effects; On state current; Physical parameters; Temperature dependence; Wide temperature ranges; Drain current

제목: On-state darin current modeling for grain and grain boundary effect of the polysilicon materials at various temperatures

저자: Yang, Hyung-Jun; Lee, Gae-Hun; Song, Yun-Heub

DOI: 10.1109/ICNIDC.2014.7000293

발행일: 2014-09

유형: Conference Paper

저널명: Proceedings of 2014 4th IEEE International Conference on Network Infrastructure and Digital Content, IEEE IC-NIDC 2014

페이지: 200 ~ 203