In-depth Analysis of the Hafnia Ferroelectrics as a Key Enabler for Low Voltage & QLC 3D VNAND beyond 1K Layers: Experimental Demonstration and Modeling

  • Kim, Giuk
  • Choi, Hyojun
  • Shin, Hunbeom
  • Lee, Sangho
  • Lee, Sangmok
  • ... Ahn, Jinho
  • 외 10명
Citations

SCOPUS

28

초록

In this work, we experimentally demonstrate a remarkable performance improvement, boosted by the interaction of charge trapping & ferroelectric (FE) switching effects in metal-band engineered gate interlayer (BE-G.IL)- FE-channel interlayer (Ch.IL)-Si (MIFIS) FeFET. The MIFIS with BE-G.IL (BE-MIFIS) facilitates the maximized 'positive feedback' (Posi. FB.) of dual effects, leading to low operation voltage (VPGM/VERS: +17/-15 V), a wide memory window (MW: 10.5 V) and negligible disturb at a biased voltage of 9 V. Furthermore, our proposed model verifies that the performance enhancement of the BE-MIFIS FeFET is attributed to the intensified posi. FB. This work proves that the hafnia FE can play as a key enabler in extending the technology development of 3D VNAND, which is currently approaching a state of stagnation.

키워드

Ferroelectric ceramicsJunction gate field effect transistorsLow power electronicsMIM devicesSystem-on-chipThree dimensional integrated circuits
제목
In-depth Analysis of the Hafnia Ferroelectrics as a Key Enabler for Low Voltage & QLC 3D VNAND beyond 1K Layers: Experimental Demonstration and Modeling
저자
Kim, GiukChoi, HyojunShin, HunbeomLee, SanghoLee, SangmokNam, YunseokJung, MinhyunMyeong, IlhoKim, KijoonWoo, JonghoLim, SuhwanKim, KwangsooKim, WankiHa, DaewonAhn, JinhoJeon, Sanghun
DOI
10.1109/VLSITechnologyandCir46783.2024.10631559
발행일
2024-06
유형
Conference paper
저널명
Digest of Technical Papers - Symposium on VLSI Technology
페이지
1 ~ 2