Continuous-time delta-sigma modulator using asynchronous SAR quantizer and digital ΔΣ Truncator

초록

As the demand for IoT related devices has increased recently, the demand for voice sensors used in these devices is increasing. Low power is a key factor because these devices have to run on batteries for long periods of time. A delta-sigma modulator is best suited for analog-to-digital converters used in the voice signal band because resolution is more important than speed. This delta sigma modulator requires a high SQNR in order to obtain high resolution, indicating that a high bit number quantizer is required. However, a high bit number quantizer requires a large number of comparators and DACs, which increases power consumption and takes up a large area. In this paper, to achieve low noise and low power dissipation, 3rd order continuous time delta-sigma (DS) ADC with a 6-bit asynchronous successive approximation register (ASAR) quantizer and a digital delta-sigma truncator which reduce a number of DACs is presented. The designed ADC front-end has been implemented through a 180 nm CMOS process and achieved 86 dB SNR and 76 dB SNDR over a 20 kHz signal band. The total chip dissipates a power of 170μW from a 1.5 V supply.

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