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High-density 3D-NAND flash with dual-string select line (D-SSL)
- Kwak, Been;
- Kwon, Daewoong;
- Yun, Jang-Gn
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0초록
In this study, high-density 3D-NAND flash memory is proposed. Using D-SSL, lateral shrink of cell area can be achieved by distinguishing two strings in a word-line (WL). We verify erase/program and read characteristics using technology computer-aided design (TCAD) simulations with rigorous calibrated condition. The proposed high density NAND flash has normally-on state SSLs through additional process and electrical treatment. In the conventional reference NAND flash, the cell string connected to the bit-line (BL) is distinguished by WL cut (WLC). On the other hand, in the proposed high density NAND flash, the cell string is selected by utilizing the normally-on state SSLs using trapped hole and doped arsenic at the intersection of SSL1 and SSL2. Compared with the conventional scheme, the proposed D-SSL exhibits almost same erase/program and read characteristics. Consequently, the proposed D-SSL scheme can increase memory density with reduced number of WLCs by distinguishing strings using D-SSL.
키워드
- 제목
- High-density 3D-NAND flash with dual-string select line (D-SSL)
- 저자
- Kwak, Been; Kwon, Daewoong; Yun, Jang-Gn
- 발행일
- 2024-09
- 유형
- Article
- 저널명
- ENGINEERING RESEARCH EXPRESS
- 권
- 6
- 호
- 3
- 페이지
- 1 ~ 8