A Novel Program Operation Scheme With Negative Bias in 3-D nand Flash Memory

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초록

In this article, we proposed a new program operation scheme to overcome the degradation of program window in scaling down of 3-D NAND( )flash memory. First, we investigated natural V-th shift (NVS) effect in scaled-down structure and confirmed that this effect occurs due to an increase in fringe field by adjacent read voltage. Second, we investigated programmed and erased V-th window with scaling down and confirmed that programmed and erased V-th is decreased significantly due to the NVS effect. To overcome this scaling effect, we proposed a new program operation scheme using negative bias. The proposed scheme not only improves the program window margin but also achieves voltage scaling. In addition, the proposed scheme enables multistring operation through improved self-boosting, which is a compatible scheme in full array level.

키워드

3-D nand flash memoryAshDry etchingElectric potentialElectron trapsnatural Vth shift (NVS)negative biasprogram operationReliabilityscaling downself-boosting operation.TimingVoltageFlash memoryMemory architectureNAND circuitsVoltage scaling3-D nand flash memoryFringe fieldsNAND flash memoryNatural vth shiftNegative biasNew projectsOperation schemesProgram operationScaling downSelf-boosting operation
제목
A Novel Program Operation Scheme With Negative Bias in 3-D nand Flash Memory
저자
Sim, Jae-MinKang, MyounggonSong, Yun-Heub
DOI
10.1109/TED.2021.3121648
발행일
2021-12
유형
Article
저널명
IEEE Transactions on Electron Devices
68
12
페이지
6112 ~ 6117