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Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory
- Song, Youngsun;
- Park, Ki-Tae;
- Kang, Myounggon;
- Song, Yunheub;
- Lee, Sungsoo;
- 외 2명
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1초록
A boosted bit line program scheme is proposed tor low operating voltage in the (MLC) NAND Hash memory Our BL to BL boosting scheme. which uses the BL coupling capacitance. is applied to achieve a higher channel potential than is possible with V-cc. so that the V-pass window margin is improved by up to 59% in 40 nm MLC NAND flash memory with 2 7 V V-cc In the case of 1 8 V V-cc, the margin of the proposed scheme is 12% higher than one of the conventional schemes at 2 7 V V-cc.
키워드
bit line; coupling capacitance; V-pass window margin; boosted channel; Capacitance; Memory architecture; NAND circuits; Bit lines; Boosted channel; Conventional schemes; Coupling capacitance; Low operating voltage; Multi level cell (MLC); NAND flash memory; Vpass window margin; Flash memory
- 제목
- Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory
- 저자
- Song, Youngsun; Park, Ki-Tae; Kang, Myounggon; Song, Yunheub; Lee, Sungsoo; Lim, Youngho; Suh, Kang-Deog
- 발행일
- 2010-03
- 유형
- Article
- 권
- E93C
- 호
- 3
- 페이지
- 423 ~ 425
- 언어
- ENG
- 출판사
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- 발행국가
- 일본
- 분량
- 3 페이지
- ISSN
- E 1745-1353
P 0916-8524