Chip to chip bonding using micro-Cu bumps with Sn capping layers

  • Lee, Jin Soo
  • Byun, Kwang Yoo
  • Chung, Qwan Ho
  • Suh, Min Suk
  • Kim, Seong Cheol
  • 외 1명
Citations

SCOPUS

4

초록

The chip to chip bonding technique using a Cu bump capped with thin Sn layers has been frequently applied to 3D chip stacking technology. We studied the effect of the microstructure on the joints. The joints were fabricated by joining micro-Cu bumps capped with Sn-Ag solder with sizes of 10 um X 10 um, 20 um X 20 um, and 30 um X 30 um to Cu pads capped with Sn-Ag solder at 245 °C-330 °C using a thermo compression bonder. Three different types of microstructure were formed in the joints depending on the bonding condition: an Sn-rich phase with Cu6Sn5 in the Cu interfaces, Cu 6Sn5 in the interior with Cu3Sn in the Cu interfaces, and one single Cu3Sn phase. The joint with only the Cu3Sn phase had the highest shear strength. Specimens were aged at 150 °C for up to 1000 h. During aging, the microstructures of all the joints became Cu 3Sn phase only. The shear strength of the joints was very sensitive to the formation of Cu3Sn and microvoids.

키워드

Lead-freeMicro-bumpShear testSn-AgTSV3D-chip stacking technologyBonding conditionsCapping layerChip bondingCu bumpsLead-FreeMicro voidsMicro-bumpsPhase-onlyRich phaseSn-Ag solderThermo-compressionBondingChip scale packagesFlip chip devicesMicroelectronicsMicrostructurePhase interfacesShear strengthSilverTin
제목
Chip to chip bonding using micro-Cu bumps with Sn capping layers
저자
Lee, Jin SooByun, Kwang YooChung, Qwan HoSuh, Min SukKim, Seong CheolKim, Young Ho
발행일
2009-06
유형
Conference Paper
저널명
2009 European Microelectronics and Packaging Conference, EMPC 2009
페이지
1 ~ 5