Implementation of IEEE802.11a software defined receiver on chip multi-processor architecture using OpenMP

초록

Software radio (SR) is a promising technology for the next generation communication since it enables to implement various communication protocols in one platform. In general, software radio systems implemented in DSPs or FPGAs deliver satisfactory performance, but they do not provide enough flexibility which is a key merit of using soft radios. In this paper we implement a software radio system on a general purpose multiprocessor. Running communication applications on an OS-based general purpose processor has several merits. However, there are two big shortcomings. First, the system may not satisfy the required performance. Second, it may be hard to meet the real time constraints. To achieve the required performance of signal processing, a chip multiprocessor is employed. Typically, ample potential for parallelization is found in communication software. Therefore by effectively utilizing task-level parallelism, chip multiprocessors can achieve the required performance. In this paper, we implement an IEEE 802.11a baseband receiver in software, and parallelize the software by OpenMP. We also propose a new synchronization technique among threads. We evaluate the performance after running the software on an Intel Quad Core workstation with the CentOS.

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